Intel Ice Lake processor support 5-level page tables to allow more address space.
I have found this is enabled on c6i.metal but not c6i.large or any others. Same AMI (Linux, tried latest RHEL and Ubuntu). In Linux this is visible in /proc/cpuinfo.
I speculate that the hypervisor is getting in the way, but I have no real evidence.
What is the cheapest possible instance that supports 5-level page tables?
