Questions tagged with FPGA Development
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Hello,
if I understand the architecture correctly, I can only have 16 interrupts \[1]. Is this correct? For my current project, it would be good to have 128+ interrupts. Is there any way to...
Accepted AnswerFPGA Development
3
answers
0
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212
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asked 5 years agolg...
Hi,
Does anybody know how to get utilization and timing reports when using SDAccel + RTL flow?. I was trying to use **--report estimate** on **xocc** but it is not reporting anything on the...
2
answers
0
votes
208
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asked 5 years agolg...
Hi,
We are seeing some critical warnings from the AWS SHELL region. So far I can see, we are not doing anything to cause them. Can you check and advise whether these are expected in general or...
1
answers
0
votes
249
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asked 5 years agolg...
Hi,
Can anyone verify if they are able to run vivado (GUI-mode) on AMI 1.5.0? I tried this on two new instances and it is causing the same issue. I verified that I am forwarding X correctly with...
3
answers
0
votes
208
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asked 5 years agolg...
Hi forum,
I'm having issues connecting to new Centos7 images generated with the 1.5.0 AMI.
Is anyone else still experiencing issues even after using the updated scripts and commands...
5
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0
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242
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asked 5 years agolg...
Hi,
My design verilog is created from hls, which later will be manually integrated with the F1 shell.
To create my verilog, the hls requires the exact Xilinx target device used in F1.
The full...
2
answers
0
votes
254
views
asked 5 years agolg...
Hello everyone,
I was wondering if there is a limit on the number of arguments, scalar and pointers, for the OpenCL + RTL kernel flow?
Currently, there is an example in SDAccel_examples that...
8
answers
0
votes
440
views
asked 5 years agolg...